by Anup Reddy | Nov 29, 2025 | Blog, UVM
Introduction As UVM testbenches evolve from simple setups to complex, multi-layered environments, configuration management becomes one of the most critical and confusing aspects of maintaining control and flexibility. Every testbench you build, regardless of its...
by Anup Reddy | Mar 2, 2024 | Systemverilog, UVM
Introduction In ASIC verification, we all use a method known as Metric Driven Verification but we don’t use that term much. Instead we always refer to it as Coverage Driven Verification. Although, both the terms means the same thing to some extent. There are...
